1. Field of the Invention
The invention relates to a substrate with embedded capacitors, and more particularly, to a substrate with vertically embedded capacitors.
2. Description of the Prior Art
Referring to FIG. 1, a conventional substrate 10 with embedded capacitors typically includes a top surface 11, a bottom surface 12, a plurality of leading wires 14, and a plurality of embedded capacitors 13 electrically connected to the leading wires 14. The embedded capacitors 13 further includes a first electrode 131, a dielectric layer 132, and a second electrode 133, in which the first electrode 131 and the second electrodes 132 are disposed in a parallel manner on the top surface 11 and the bottom surface 12 respectively. A chip 50 is electrically connected to the embedded capacitors 13 through the leading wires 14. Preferably, the layout of the first electrode 131 and the second electrode 133 of the embedded capacitors 13 is designed with respect to a horizontal manner, in which the electrodes are placed in a parallel manner on the top surface 11 and the bottom surface 12. This design not only reduces the utilization space but also limits the number of embedded capacitors 13 that can be placed on the substrates. If the number of embedded capacitors 13 becomes insufficient and extra capacitors were to be added externally, an additional surface mount process may be required and the overall cost and size of the package would increase accordingly.